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Fast feedthrough logic a high performance logic family for GaAs
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Abstract
A GaAs dynamic logic family using the feedthrough evaluation concept is presented in this paper. Feedthrough logic (FTL) allows the outputs to be partially generated before the input signals arrive. A modified version of this logic, where the function and its complement are implemented in a differential structure, is also introduced. In an FTL gate, the logic outputs are reset to low during the high phase of the clock and evaluated during the low phase of the clock. Resetting to low alleviates the problems of charge sharing and leakage current associated with the other GaAs dynamic logic families. FTL logic functions can be cascaded in a domino-like fashion without a need for the intervening inverters. We employ this novel concept to design several arithmetic circuits. We compare a 4-bit ripple carry adder in FTL with the other published works in terms of device count, area, delay, clock rate and power consumption. The results demonstrate that FTL is the simplest, the fastest, and consumes least power. In addition, our FTL design compares very well with the standard CMOS technology. FTL gates are fully compatible with direct coupled field-effect transistor logic (DCFL), and therefore, can be included in a DCFL standard cell library for improving cell-based ASIC performance. To match the high-speed of the FTL combinational blocks, we present a single-ended latch for pipelining the FTL blocks. Comparisons with the other published results demonstrate the superior performance of our dynamic latch.
翻译
快速传送到逻辑高性能的逻辑家族的材料
文摘
一种材料动态逻辑家庭使用的概念是流经评价进行了阐述。通过饲料逻辑(整车)允许的输出部分的输入信号产生之前到达。这一逻辑的修改版本,功能及其实现差分互补结构,进行了介绍。在一个整车门、逻辑输出改为低在高阶段的时钟和评估,在低相位的时钟。重置到较低的问题,缓解的共享和泄漏电流与其它材料动态逻辑家族。整车逻辑函数可以在一个骨牌一样逆变器没有必要时尚的干预。我们使用这个新概念到设计的几个运算电路。我们比较了4比特脉动进行整车与其他的调皮的装置作品数、区、延误,时钟速率和功耗。结果表明,整车是最简单、最快的,且消耗最小力量。此外,整车设计比较与标准的CMOS技术。比尔·盖茨是完全相容于整车耦合场效应晶体管逻辑直接(DCFL),因此,可以包含在一个DCFL标准电池性能提高基于图书馆集成电路。匹配的快速的整车组合块,我们提出了一个结束单人赛门闩,流水线的区块。整车与其他出版的比较验证性能优越的动态的门闩。
Combined regressor methods and adaptive IIR filtering
Abstract
An open issue in adaptive infinite-impulse response (IIR) filtering is that of convergence to a global minimum in the presence of observation noise when the system is insufficiently modeled . It is well known , that algorithms based on equation error (EE) formulation contain a single minimum that may be biased whereas, algorithms based on output error (OE) ensure the existence of an unbiased global minimum in presence of local minima. Recently, there have been several attempts to combine these formulations in order to ensure the existence and uniqueness of an unbiased minimum. Works presented here, EEOE and modified EEOE (MEEOE), are such attempts in the context of system identification. We will show, analytically and through simulations, the convergence properties of the MEEOE approach, in the context of system identification.
翻译
结合检索方法和自适应滤波成立
开放的问题无限的冲动自适应滤波的回应(检索)的全球最低的收敛存在观测噪声时,该系统还不够。众所周知,基于方程的算法误差(EE)配方含有一个最小的,可能是偏见而算法根据输出误差(部分),保证了存在的一个无偏全球最低的局部最小值。最近,有几次尝试把这些配方,以确保解的存在唯一性的无偏最小。这里介绍,EEOE作品和修改EEOE(MEEOE),这样的尝试语境中的系统识别。我们将显示,分析并通过模拟、收敛性能的方法,MEEOE语境中的系统识别。
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